[ 原始碼： opensta ]
套件：opensta-dev（0~20191111gitc018cb2+dfsg-1）
opensta-dev 的相關連結
Debian 的資源：
下載原始碼套件 opensta：
- [opensta_0~20191111gitc018cb2+dfsg-1.dsc]
- [opensta_0~20191111gitc018cb2+dfsg.orig.tar.xz]
- [opensta_0~20191111gitc018cb2+dfsg-1.debian.tar.xz]
維護小組：
外部的資源：
- 主頁 [github.com]
相似套件：
Gate-level Static Timing Analyzer - development files
After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.
It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.
This package contains the header files and some libraries for development.
下載 opensta-dev
| 硬體架構 | 套件大小 | 安裝後大小 | 檔案 |
|---|---|---|---|
| amd64 | 1，184。9 kB | 9，937。0 kB | [檔案列表] |
| arm64 | 1，139。6 kB | 9，848。0 kB | [檔案列表] |
| armel | 1，119。4 kB | 8，448。0 kB | [檔案列表] |
| armhf | 1，130。8 kB | 7，795。0 kB | [檔案列表] |
| i386 | 1，282。1 kB | 8，585。0 kB | [檔案列表] |
| mips64el | 1，327。7 kB | 12，383。0 kB | [檔案列表] |
| mipsel | 1，287。3 kB | 9，343。0 kB | [檔案列表] |
| ppc64el | 1，266。7 kB | 11，260。0 kB | [檔案列表] |
| s390x | 1，078。3 kB | 9，765。0 kB | [檔案列表] |