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[ Source: arachne-pnr  ]

Package: arachne-pnr (0.1+20190728gitc40fb22-2)

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Place and route tool for iCE40 family FPGAs

Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.

Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.

The authors of arachne-pnr have now prepared its successor 'nextpnr'.

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Download for all available architectures
Architecture Package Size Installed Size Files
amd64 206.2 kB653.0 kB [list of files]
arm64 181.4 kB569.0 kB [list of files]
armel 172.7 kB556.0 kB [list of files]
armhf 181.8 kB396.0 kB [list of files]
i386 226.3 kB736.0 kB [list of files]
mips64el 184.3 kB769.0 kB [list of files]
mipsel 187.0 kB768.0 kB [list of files]
ppc64el 208.9 kB729.0 kB [list of files]
s390x 180.7 kB645.0 kB [list of files]