Package: iverilog (12.0-2 and others)

[ Source: iverilog  ]

Icarus verilog compiler

Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.

The compiler can target either simulation, or netlist (EDIF).

Tags: Field: Electronics, Implemented in: C++, User Interface: interface::commandline, role::program

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Download iverilog

Download for all available architectures

Architecture	Version	Package Size	Installed Size	Files
alpha (unofficial port)	12.0-2+b1	1,819.8 kB	8,434.0 kB	[list of files]
amd64	12.0-2+b1	1,998.1 kB	7,022.0 kB	[list of files]
arm64	12.0-2+b1	1,795.7 kB	7,672.0 kB	[list of files]
armel	12.0-2+b1	1,731.9 kB	6,199.0 kB	[list of files]
armhf	12.0-2+b1	1,786.5 kB	4,899.0 kB	[list of files]
hppa (unofficial port)	12.0-2+b1	1,849.0 kB	6,742.0 kB	[list of files]
i386	12.0-2+b1	2,076.8 kB	7,043.0 kB	[list of files]
ia64 (unofficial port)	12.0-2+b1	2,129.2 kB	11,793.0 kB	[list of files]
m68k (unofficial port)	12.0-2+b1	1,928.1 kB	6,897.0 kB	[list of files]
mips64el	12.0-2+b1	1,658.7 kB	9,106.0 kB	[list of files]
ppc64 (unofficial port)	12.0-2+b1	1,968.7 kB	9,737.0 kB	[list of files]
ppc64el	12.0-2+b1	2,001.7 kB	9,093.0 kB	[list of files]
riscv64	12.0-2+b2	1,995.6 kB	6,278.0 kB	[list of files]
s390x	12.0-2+b1	1,957.2 kB	7,271.0 kB	[list of files]
sh4 (unofficial port)	12.0-2+b1	2,194.8 kB	7,307.0 kB	[list of files]
sparc64 (unofficial port)	12.0-2+b1	1,669.3 kB	25,160.0 kB	[list of files]
x32 (unofficial port)	12.0-2+b1	2,010.9 kB	6,466.0 kB	[list of files]