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[ Source: iverilog  ]

Package: iverilog (0.9.5-1)

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Icarus verilog compiler

Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.

The compiler can target either simulation, or netlist (EDIF).

Tags: Field: Electronics, Implemented in: C++, User Interface: interface::commandline, role::program

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Architecture Package Size Installed Size Files
amd64 1,419.9 kB3,630.0 kB [list of files]
armel 1,303.1 kB3,146.0 kB [list of files]
armhf 1,226.9 kB2,592.0 kB [list of files]
i386 1,413.3 kB3,576.0 kB [list of files]
ia64 1,898.4 kB6,549.0 kB [list of files]
kfreebsd-amd64 1,420.1 kB3,578.0 kB [list of files]
kfreebsd-i386 1,411.3 kB3,523.0 kB [list of files]
mips 1,296.5 kB3,775.0 kB [list of files]
mipsel 1,282.6 kB3,775.0 kB [list of files]
powerpc 1,439.0 kB3,711.0 kB [list of files]
s390 1,418.9 kB3,647.0 kB [list of files]
s390x 1,497.1 kB4,087.0 kB [list of files]
sparc 1,304.8 kB3,451.0 kB [list of files]