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[ Source: arachne-pnr  ]

Package: arachne-pnr (0.1+20180909git840bdfd-1)

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Place and route tool for iCE40 family FPGAs

Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.

Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.

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Download for all available architectures
Architecture Package Size Installed Size Files
amd64 192.3 kB592.0 kB [list of files]
arm64 172.3 kB528.0 kB [list of files]
armel 158.4 kB487.0 kB [list of files]
armhf 166.7 kB347.0 kB [list of files]
i386 214.5 kB671.0 kB [list of files]
mips 175.6 kB725.0 kB [list of files]
mips64el 177.2 kB729.0 kB [list of files]
mipsel 178.7 kB721.0 kB [list of files]
ppc64el 192.6 kB664.0 kB [list of files]
s390x 169.8 kB592.0 kB [list of files]