Cver is a full 1995 IEEE P1364 standard Verilog simulator. It also implements some of the 2001 P1364 standard features. All three PLI interfaces (tf_, acc_, and vpi_) are implemented as defined in the IEEE 2001 P1364 LRM.
Homepage: http://www.pragmatic-c.com/gpl-cver
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| Architecture | Package Size | Installed Size | Files |
|---|---|---|---|
| alpha | 940.1 kB | 2092 kB | [list of files] |
| amd64 | 863.2 kB | 1764 kB | [list of files] |
| arm | 815.2 kB | 1640 kB | [list of files] |
| armel | 817.9 kB | 1644 kB | [list of files] |
| hppa | 891.2 kB | 1756 kB | [list of files] |
| hurd-i386 | 763.6 kB | 1604 kB | [list of files] |
| i386 | 780.6 kB | 1616 kB | [list of files] |
| ia64 | 1,281.3 kB | 3576 kB | [list of files] |
| kfreebsd-amd64 (unofficial port) | 863.1 kB | 1746 kB | [list of files] |
| kfreebsd-i386 (unofficial port) | 778.2 kB | 1602 kB | [list of files] |
| m68k | 717.1 kB | 1516 kB | [list of files] |
| mips | 866.1 kB | 2164 kB | [list of files] |
| mipsel | 864.8 kB | 2160 kB | [list of files] |
| powerpc | 862.9 kB | 1844 kB | [list of files] |
| s390 | 868.5 kB | 1776 kB | [list of files] |
| sparc | 820.8 kB | 1716 kB | [list of files] |