Package: gplcver (2.12a-1.1)

[ Source: gplcver  ]

Verilog simulator

Cver is a full 1995 IEEE P1364 standard Verilog simulator. It also implements some of the 2001 P1364 standard features. All three PLI interfaces (tf_, acc_, and vpi_) are implemented as defined in the IEEE 2001 P1364 LRM.

Homepage: http://www.pragmatic-c.com/gpl-cver

Tags: Software Development: Need an extra tag, Interpreter, Field: Electronics, Implemented in: implemented-in::c, role::program, Purpose: Simulating

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• dep: libc0.1 (>= 2.3) [kfreebsd-amd64, kfreebsd-i386]

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• dep: libc6 (>= 2.13) [s390x]

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Download gplcver

Download for all available architectures

Architecture	Package Size	Installed Size	Files
amd64	901.4 kB	1,924.0 kB	[list of files]
armel	841.4 kB	1,760.0 kB	[list of files]
armhf	785.0 kB	1,342.0 kB	[list of files]
i386	813.4 kB	1,760.0 kB	[list of files]
ia64	1,310.4 kB	3,732.0 kB	[list of files]
kfreebsd-amd64	900.6 kB	1,900.0 kB	[list of files]
kfreebsd-i386	813.7 kB	1,740.0 kB	[list of files]
mips	872.1 kB	2,200.0 kB	[list of files]
mipsel	868.8 kB	2,196.0 kB	[list of files]
powerpc	899.9 kB	1,996.0 kB	[list of files]
s390	895.9 kB	1,900.0 kB	[list of files]
s390x	940.8 kB	2,129.0 kB	[list of files]
sparc	848.2 kB	1,848.0 kB	[list of files]