Balík: confluence (0.10.6-3 a iné)

language for synchronous reactive hardware system design

From the upstream website <http://www.confluent.org>:

A Confluence program can generate digital logic for an FPGA or ASIC platform, or C code for hard real-time software.

Confluence combines the component-based methodologies of Verilog and VHDL with the expressiveness of higher order functional programming.

In comparison to Verilog, VHDL, and C, systems designed in Confluence result in 2X to 10X code reduction, making the source easier to manage and reuse. And because Confluence relies on a correct-by-construction compiler, bugs are reduced--some are prevented altogether--thus reducing the overall verification effort.