Şu takıma sınırla: [buster] [buster-updates] [buster-backports] [bullseye] [bullseye-updates] [bullseye-backports] [bookworm] [bookworm-updates] [bookworm-backports] [trixie] [sid] [experimental]
Mimariye sınırla: [alpha] [amd64] [arm] [arm64] [armel] [armhf] [avr32] [hppa] [hurd-i386] [i386] [ia64] [kfreebsd-amd64] [kfreebsd-i386] [m68k] [mips] [mips64el] [mipsel] [powerpc] [powerpcspe] [ppc64] [ppc64el] [riscv64] [s390] [s390x] [sh4] [sparc] [sparc64] [x32]
Tüm mimarilerde ara
Bazı sonuçlar arama parametrelerinden dolayı görüntülenemedi.
tüm takımlar takımının tüm bölümler bölümlerinde ve mimari(ler) riscv64 mimarilerinde, yosys sözünü barındıran paketler aradınız 5 eşleşen paket bulundu.
Tam eşleşmeler
yosys Paketi
- sid (unstable) (electronics):
Framework for Verilog RTL synthesis
0.33-5+b3: riscv64 - experimental (electronics):
Framework for Verilog RTL synthesis
0.33-6~exp2+b1: riscv64
Diğer eşleşmeler
yosys-abc Paketi
- sid (unstable) (electronics):
Sequential Logic Synthesis and Verification Algorithms
0.33-5+b3: riscv64 - experimental (electronics):
Sequential Logic Synthesis and Verification Algorithms
0.33-6~exp2+b1: riscv64
yosys-dbgsym Paketi
- sid (unstable) (debug):
debug symbols for yosys
0.23-6 [debports]: riscv64
yosys-dev Paketi
- sid (unstable) (electronics):
Framework for Verilog RTL synthesis (development files)
0.33-5+b3: riscv64 - experimental (electronics):
Framework for Verilog RTL synthesis (development files)
0.33-6~exp2+b1: riscv64
yosys-doc Paketi
- buster (oldoldstable) (doc):
Documentation for Yosys
0.8-1: all - bullseye (oldstable) (doc):
Documentation for Yosys
0.9-1: all - bookworm (stable) (doc):
Documentation for Yosys
0.23-6: all - trixie (testing) (doc):
Framework for Verilog RTL synthesis (documentation)
0.33-5: all - sid (unstable) (doc):
Framework for Verilog RTL synthesis (documentation)
0.33-5: all - experimental (doc):
Framework for Verilog RTL synthesis (documentation)
0.33-6~exp2: all