Pakket: verilog (0.9.1-2)

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Homepage [www.icarus.com]

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Icarus verilog compiler (transitional package)

Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.

The compiler can target either simulation, or netlist (EDIF).

This is a dummy transitional package that will ensure a proper upgrade path. This package may be safely removed after upgrading.

Tags: Softwareontwikkeling: Compiler, Field: Elektronica, User Interface: Text-based Interactive, Role: Program, Scope: Utility, Interface Toolkit: Ncurses TUI

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Platform	Pakketgrootte	Geïnstalleerde grootte	Bestanden
all	5,6 kB	32 kB	[overzicht]